Recent News
October 2009
10/26/2009
Doctoral candidate, Saurabh Mookerjea, will present a paper entitled "Experimental Demonstration of 100nm Channel Length In0.53Ga0.47As-based Vertical Inter-band Tunnel Field Effect Transistors (TFETs) for Ultra Low-Power Logic and SRAM Applications," at the 55th annual IEEE International Electron Devices Meeting (IEDM) in December. The research conducted in our group Penn State in collaboration with researchers from Cornell and IQE Inc. was highlighted as a significant late news paper by the IEDM technical program committee. For more information please see:
10/22/2009
Doctoral candidate, Ramakrishnan Krishnan, successfully completed and defended his doctoral thesis entitled "Analysis of Failures in Nanoscale Devices". He will be joining the advanced technology platform group at Taiwan Semiconductor Manufacturing Corporation (TSMC) in Hsinchu, Taiwan. Congratulations to Ramki!
10/22/2009 Undergraduate student, Chad Ostrowski, successfully passed the Engineering Science and Mechanics bachelors' thesis oral exam. His honors thesis was entitled "Exploration of novel heterostructures in compound semiconductors to create energy efficient tunneling transistors". Congratulations to Chad !
10/08/2009 Datta gave an invited talk on "Green Transistors to Green Computing Architectures" University of Hannover, Hannover, Germany. The talk was sponsored by the Institut für Materialien und Bauelemente der Elektronik.
10/06/2009 Datta gave an invited talk on "Small Signal Response of Inversion Layers in High Mobility In0.53Ga0.47As MOSFETs Made with Thin High-k Dielectrics" at the Physics and Technology of High-k Gate Dielectrics symposium at the 216th Meeting of the Electrochemical Society Meeting in Vienna, Austria. http://www.electrochem.org/meetings/biannual/216/216.htm
10/02/2009 Graduate student, Ashkar Ali, successfully passed his doctoral candidacy exam. Congratulations to Ashkar !
10/26/2009
Doctoral candidate, Saurabh Mookerjea, will present a paper entitled "Experimental Demonstration of 100nm Channel Length In0.53Ga0.47As-based Vertical Inter-band Tunnel Field Effect Transistors (TFETs) for Ultra Low-Power Logic and SRAM Applications," at the 55th annual IEEE International Electron Devices Meeting (IEDM) in December. The research conducted in our group Penn State in collaboration with researchers from Cornell and IQE Inc. was highlighted as a significant late news paper by the IEDM technical program committee. For more information please see: 
10/22/2009
Doctoral candidate, Ramakrishnan Krishnan, successfully completed and defended his doctoral thesis entitled "Analysis of Failures in Nanoscale Devices". He will be joining the advanced technology platform group at Taiwan Semiconductor Manufacturing Corporation (TSMC) in Hsinchu, Taiwan. Congratulations to Ramki! 10/22/2009 Undergraduate student, Chad Ostrowski, successfully passed the Engineering Science and Mechanics bachelors' thesis oral exam. His honors thesis was entitled "Exploration of novel heterostructures in compound semiconductors to create energy efficient tunneling transistors". Congratulations to Chad !
10/08/2009 Datta gave an invited talk on "Green Transistors to Green Computing Architectures" University of Hannover, Hannover, Germany. The talk was sponsored by the Institut für Materialien und Bauelemente der Elektronik.
10/06/2009 Datta gave an invited talk on "Small Signal Response of Inversion Layers in High Mobility In0.53Ga0.47As MOSFETs Made with Thin High-k Dielectrics" at the Physics and Technology of High-k Gate Dielectrics symposium at the 216th Meeting of the Electrochemical Society Meeting in Vienna, Austria. http://www.electrochem.org/meetings/biannual/216/216.htm
10/02/2009 Graduate student, Ashkar Ali, successfully passed his doctoral candidacy exam. Congratulations to Ashkar !
September 2009
09/28/09 Prof. Datta gave an invited talk on "Tyranny of Non-Ideal Interfaces and Related III-V Transistor Performance" at the International Symposium on Integrated Ferroelectrics and Functionalities (ISIF2) in Colorado Springs, Colorado. http://www.isif.net
09/28/09 Doctoral candidate, Zhao Fang, presented a technical poster on "Sensitivity enhancement of magnetic sensors based on Metglas/PVDF laminates using the flux concentration effect" at the Nanoelectronic Devices for Defense and Security Conference (NANO-DDS) in Fort Lauderdale, Florida. http://www.nano-dds.com/2009/
09/28/09 Prof. Datta gave an invited talk on "Tyranny of Non-Ideal Interfaces and Related III-V Transistor Performance" at the International Symposium on Integrated Ferroelectrics and Functionalities (ISIF2) in Colorado Springs, Colorado. http://www.isif.net
09/28/09 Doctoral candidate, Zhao Fang, presented a technical poster on "Sensitivity enhancement of magnetic sensors based on Metglas/PVDF laminates using the flux concentration effect" at the Nanoelectronic Devices for Defense and Security Conference (NANO-DDS) in Fort Lauderdale, Florida. http://www.nano-dds.com/2009/
August 2009
08/25/09 Datta gave a lecture on "Implication of Non ideal Interfaces for Various III-V Transistor Architecture" at the 6th International Symposium on Advanced Gate Stack Technology in San Francisco, CA, organized by International Sematech. http://www.sematech.org/meetings/announcements/8671/program.htm
08/21/09 Datta teams up with Prof. V. Narayanan of Penn State University to teach an embedded tutorial on "Green transistors to green computing architectures" at the IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED) in San Francisco, CA http://www.islped.org/2009/final_program.pdf
08/20/09 Datta gave a plenary talk on "Low voltage tunnel transistor" at the IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED) in San Francisco, CA http://www.islped.org/2009/final_program.pdf
08/25/09 Datta gave a lecture on "Implication of Non ideal Interfaces for Various III-V Transistor Architecture" at the 6th International Symposium on Advanced Gate Stack Technology in San Francisco, CA, organized by International Sematech. http://www.sematech.org/meetings/announcements/8671/program.htm
08/21/09 Datta teams up with Prof. V. Narayanan of Penn State University to teach an embedded tutorial on "Green transistors to green computing architectures" at the IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED) in San Francisco, CA http://www.islped.org/2009/final_program.pdf
08/20/09 Datta gave a plenary talk on "Low voltage tunnel transistor" at the IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED) in San Francisco, CA http://www.islped.org/2009/final_program.pdf
June 2009
06/22/09 Graduate students, S. Mookerjea and A. Ali, each gave a poster presentation on "Non equilibrium hot carrier transport in band gap engineered tunnel transistors" and "high-k gated, self aligned and directly contacted InAs quantum-well transistors", respectively, at the Device Research Conference held at Penn State University, University Park, PA. http://drc.ee.psu.edu/advanceprog.asp
06/23/09 Datta partnered with Dr. Heike Riel of IBM Zurich to organize a super charged evening rump session entitled "Steep Slope or Slippery Slope". The panelists from Notre Dame Univ., Purdue Univ., Univ. of Michigan and MIT debated on the pros and cons of tunnel transistors from choice of materials to architecture to circuit implications. http://drc.ee.psu.edu/advanceprog.asp
06/22/09 Graduate students, S. Mookerjea and A. Ali, each gave a poster presentation on "Non equilibrium hot carrier transport in band gap engineered tunnel transistors" and "high-k gated, self aligned and directly contacted InAs quantum-well transistors", respectively, at the Device Research Conference held at Penn State University, University Park, PA. http://drc.ee.psu.edu/advanceprog.asp
06/23/09 Datta partnered with Dr. Heike Riel of IBM Zurich to organize a super charged evening rump session entitled "Steep Slope or Slippery Slope". The panelists from Notre Dame Univ., Purdue Univ., Univ. of Michigan and MIT debated on the pros and cons of tunnel transistors from choice of materials to architecture to circuit implications. http://drc.ee.psu.edu/advanceprog.asp
May 2009
05/26/09 Datta gave an online seminar as part of the NRI e-Workshop series on "Tunnel Transistor Architecture and its Viability for Energy Efficient Logic Applications" Abstract: Since 1926 it is well accepted that the continuous nonzero nature of solutions to Schrodinger's wave equation used to represent electrons, even in classically forbidden regions of negative kinetic energy, allows for a finite and tunable probability of tunneling from one classically allowed region to another (for example band to band tunneling in a semiconductor). We have recently initiated the investigation of a novel transistor architecture based on such tunneling mechanism as a step towards exploring steep switching transistors for energy efficient logic applications. In this seminar, I will attempt to address the following topics regarding the tunnel transistor architecture: a) the choice of appropriate materials to tune the transfer characteristics over a specified gate swing b) the characteristic screening lengths to observe saturation in the output characteristics in order to provide gain c) an effective way to estimate the switching speed of such devices considering enhanced Miller capacitance effect and d) the importance of nonequilibrium carrier dynamics on the device terminal characteristics.
05/27/09 Datta gave an invited lecture on "Inter-band Tunnel Transistor Architecture using Narrow Gap Semiconductors," at the Symposium on Graphene and Emerging Materials for Post-CMOS Applications at the Electrochemcial Society Conference in San Francisco, CA.
05/26/09 Datta gave an online seminar as part of the NRI e-Workshop series on "Tunnel Transistor Architecture and its Viability for Energy Efficient Logic Applications" Abstract: Since 1926 it is well accepted that the continuous nonzero nature of solutions to Schrodinger's wave equation used to represent electrons, even in classically forbidden regions of negative kinetic energy, allows for a finite and tunable probability of tunneling from one classically allowed region to another (for example band to band tunneling in a semiconductor). We have recently initiated the investigation of a novel transistor architecture based on such tunneling mechanism as a step towards exploring steep switching transistors for energy efficient logic applications. In this seminar, I will attempt to address the following topics regarding the tunnel transistor architecture: a) the choice of appropriate materials to tune the transfer characteristics over a specified gate swing b) the characteristic screening lengths to observe saturation in the output characteristics in order to provide gain c) an effective way to estimate the switching speed of such devices considering enhanced Miller capacitance effect and d) the importance of nonequilibrium carrier dynamics on the device terminal characteristics.
05/27/09 Datta gave an invited lecture on "Inter-band Tunnel Transistor Architecture using Narrow Gap Semiconductors," at the Symposium on Graphene and Emerging Materials for Post-CMOS Applications at the Electrochemcial Society Conference in San Francisco, CA.
March 2009
03/02/2009 Graduate student, Feng Li, successfully passes the EE written and oral doctoral candidacy exam. Congrats to Feng !
03/02/2009 Graduate student, Feng Li, successfully passes the EE written and oral doctoral candidacy exam. Congrats to Feng !
February 2009
02/20/09 Datta is interviewed by Science Magazine in an article titled "Is Silicon's Reign Nearing Its End?" The article discusses the continued evolution of the high performance CMOS logic technology, focusing particularly on the new materials that have been introduced or proposed and the potential future of the high performance CMOS transistor technology. Article is posted online at http://www.sciencemag.org/cgi/reprint/323/5917/1000.pdf
02/20/09 Datta is interviewed by Science Magazine in an article titled "Is Silicon's Reign Nearing Its End?" The article discusses the continued evolution of the high performance CMOS logic technology, focusing particularly on the new materials that have been introduced or proposed and the potential future of the high performance CMOS transistor technology. Article is posted online at http://www.sciencemag.org/cgi/reprint/323/5917/1000.pdf